1. Field of the Invention
The present invention relates to a semiconductor memory device and a method for operating the semiconductor memory device.
2. Description of the Related Art
Japanese Patent Laid-open No. 2006-65533 and 2004-318500 are referenced in connection with the present invention.
Today, diverse types of semiconductor memory devices are offered for use as RAM chips in various electronic apparatuses. These memory devices vary in terms of circuit structure, operation and functionality. There are two major categories of RAM's from a circuit structure and operation point of view: DRAM (dynamic random access memory); and SRAM (static random access memory). As a variation of the DRAM, there is the SDRAM (synchronous dynamic random access memory) that outputs data in synchronism with an externally supplied clock signal. The SDRAM comes in such subtypes as SDR-SDRAM (single data rate SDRAM)), DDR-SDRAM (double data rate SDRAM), DDR2-SDRAM, DDR3-SDRAM, . . . DDR(n)-SDRAM.
From a structural point of view, there is a variation called the DPRAM (dual port RAM) that has a plurality of access ports. In functional terms, there is a variation known as the FIFO (first in first out) type RAM that has no need for addressing.
The above-outlined memory types are used selectively depending on what is needed by the host electronic apparatus. In the description that follows, the SDR-SDRAM will be referred to as the SDR, the DDR-SDRAM as the DDR, the DDR2-SDRAM as the DDR2, the DDR3-SDRAM through DDR(n)-SDRAM as the DDR3 through DDR(n), and the FIFO type as the FIFO for purposes of description.